The invention relates to a method for fabricating composite structures having high heat dissipation properties, dedicated to be substrates for the crystal growth of single-crystal layers aimed to receive electronic devices or components or, substrates including such single-crystal layers.
These structures may especially be useful for dissipating the heat generated by the components during operation. They are particularly useful when the components generate a lot of thermal energy, as for high power frequency components (typically more than 900 MHz). Indeed, if the temperature of the single-crystal layer is greater than a threshold temperature, the components could be disturbed or even damaged.
To overcome this drawback, the single-crystal layers are typically made of a nitride semiconductor material having better charge carrying properties (high saturation rate of carriers at high voltages, high breakdown voltages, etc.) than materials such as AsGa. This is particularly true for HEMT (High Electron Mobility Transistor) type components.
To form this type of nitride semiconductor layers, growth substrates made of single-crystal bulk SiC, bulk <111> silicon or bulk sapphire (Al2O3) are used. However, thermal impedances of <111> Si and sapphire are too high for some high power frequency applications that require greater dissipation of released heat. Thus the components could still be disturbed or damaged. And single-crystal bulk SiC is a costly material, although it is a reference material in terms of heat dissipation.
Thus there is a need for substrates which sufficiently dissipate thermal energy at relatively low cost. For this goal, U.S. Pat. No. 6,328,796 and US published patent application 2003/0064735 disclose the manufacturing of composite structures using a wafer bonding technique comprising the following steps:
providing a substrate and a wafer with a top single-crystal layer thereon,
forming a bonding oxide layer on the substrate and/or on the top layer;
bonding the substrate and the wafer such that the oxide layer and the top layer are at the bonding interface,
reducing the wafer for only leaving the top layer bonded to the substrate via the oxide layer, thus forming the structure, and
heat treating this structure for reinforcing the bonding.
Different techniques have been developed nowadays to reduce the wafer, such as the well known processes called SMART-CUT® (whose general description is fully explained in the publication SILICON-ON-INSULATOR TECHNOLOGY: Materials to VLSI, 2nd Edition (Jean-Pierre COLINGE) or BESOI (Bond Etch Silicon On Insulator).
The structure finally obtained from this process comprises the top layer on the oxide layer on the substrate. The top layer might be made of sapphire, Si <111>, SiC or any other semiconductor material that insures the quality of a growth of a useful layer thereon, e.g. made of a material for high frequency components like GaN. Additionally, the substrate is chosen for having high heat dissipation properties—i.e. a high thermal conductivity—in order to dissipate the heat produced by the components.
Since the crystal quality of the useful layer during growth on the composite structure is insuring by the top layer, it is not necessary providing the substrate with a high crystal quality. It is for example possible providing a substrate made of a polycrystalline material, like polycrystalline SiC (“polySiC”). These kinds of composite structures are therefore less costly than those of single-crystal SiC while still being a good substrate for the growth of a subsequent useful layer and still having good heat dissipation properties.
Even so, certain designed components still require better heat dissipation. Thus, there is a need for such heat dissipating structures and these are now provided by the present invention